Author : L Suresh 1
Date of Publication :15th September 2017
Abstract: In this paper, a novel multilevel dc–ac inverter is pro-posed. The proposed multilevel inverter generates seven-level ac output voltage with the appropriate gate signals’ design. Also, the low-pass filter is used to reduce the total harmonic distortion of the sinusoidal output voltage. The switching losses and the voltage stress of power devices can be reduced in the proposed multi-level inverter. The operating principles of the proposed inverter and the voltage balancing method of input capacitors are dis-cussed. Finally, a laboratory prototype multilevel inverter with 400-V input voltage and output 220 Vrms/2 kW is implemented. The multilevel inverter is controlled with sinusoidal pulse-width modulation (SPWM) by TMS320LF2407 digital signal processor (DSP). Experimental results show that the maximum efficiency is 96.9% and the full load efficiency is 94.6%.
- R. Gonzalez, E. Gubia, J. Lopez, and L. Marroyo, “Transformerless single-phase multilevel-based photovoltaic inverter,” IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 2694– 2702, Jul. 2008.
- S. Daher, J. Schmid, and F. L. M. Antunes, “Multilevel inverter topologies for stand-alone PV systems,” IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 2703–2712, Jul. 2008.
- W. Yu, J. S. Lai, H. Qian, and C. Hutchens, “Highefficiency MOSFET inverter with H6-type configuration for photovoltaic nonisolated, ac-module applications,” IEEE Trans. Power Electron., vol. 26, no. 4, pp. 1253–1260, Apr. 2011.
- R. A. Ahmed, S. Mekhilef, and W. P. Hew, “New multilevel inverter topology with minimum number of switches,” in Proc. IEEE Region 10 Conf. (TENCON), 2010, pp. 1862–1867.
- M. R. Banaei and E. Salary, “New multilevel inverter with reduction of switches and gate driver,” in Proc. IEEE 18th Iran. Conf. Elect. Eng. (IECC), 2010, pp. 784–789.
- N. A. Rahim, K. Chaniago, and J. Selvaraj, “Singlephase seven-level grid-connected inverter for photovoltaic system,” IEEE Trans. Ind. Electron., vol. 58, no. 6, pp. 2435– 2443, Jun. 2011.
- K. Hasegawa and H. Akagi, “A new dc-voltagebalancing circuit includ-ing a single coupled inductor for a five-level diode-clamped PWM inverter,” IEEE Trans. Ind. Appl., vol. 47, no. 2, pp. 841–852, Mar./Apr. 2011.
- T. Ito, M. Kamaga, Y. Sato, and H. Ohashi, “An investigation of voltage balancing circuit for dc capacitors in diode-clamped multilevel inverters to realize high output power density converters,” in Proc. IEEE Energy Convers. Congr. Expo. (ECCE), 2010, pp. 3675–3682.
- A. Shukla, A. Ghosh, and A. Joshi, “Flyingcapacitor-based chopper circuit for dc capacitor voltage balancing in diode-clamped multilevel inverter,” IEEE Trans. Ind. Electron., vol. 57, no. 7, pp. 2249–2261, Jul. 2010.
- C. L. Xia, X. Gu, T. N. Shi, and Y. Yan, “Neutralpoint potential balancing of three-level inverters in directdriven wind energy conversion system,” IEEE Trans. Energy Convers., vol. 26, no. 1, pp. 18–29, Mar. 2011.