Open Access Journal

ISSN : 2395-2717 (Online)

International Journal of Engineering Research in Computer Science and Engineering (IJERCSE)

Monthly Journal for Computer Science and Engineering

Open Access Journal

International Journal of Engineering Research in Electrical and Electronic Engineering(IJEREEE)

Monthly Journal for Electrical and Electronic Engineering

ISSN : 2395-2717 (Online)

Cascaded Multilevel Inverter Topology with SPWM and Selective Harmonic Elimination Modular Techniques-A Review

Author : Champa PN 1 Dr.Vidya HA 2

Date of Publication :30th November 2020

Abstract: In the recent decades Multilevel inverters have been attracted the wide interest of researcher as well as industry for high-power and medium-voltage control. Additionally, they can combine switched waveforms with lower levels of harmonic distortion compared with the conventional two-level converter. The multilevel model is used to decrease the harmonic distortion in the output waveform without decreasing the inverter output power. This paper presents the most important popular topologies like diode-clamped or neutral point clamped inverter, flying capacitor or capacitor-clamped inverter, and cascaded H bridge multilevel inverter. Most commonly used modulation technique such as Sinusoidal, Modified and Random Pulse Width Modulation, Third harmonic injection, Space Vector Pulse Width Modulation Technique (SVPWM), Delta Modulation, Selective Harmonic Elimination (SHE) and Wavelet Modulation Technique (WM) are discussed and a review on CCHMLI with most frequently used control techniques such as SPWM and SHE methods are discussed enabling improvement in technology in both industry and research areas.

Reference :

    1. Shuvangkar shuvo, eklas hossain,” Design and Hardware Implementation Considerations of Modified Multilevel Cascaded H-Bridge Inverter for Photovoltaic System”, Received December 10, 2018, accepted January 4, 2019, date of publication January 24, 2019, date of current version February 12, 2019.
    2. Yidan Li and Bin Wu, “A Novel DC Voltage Detection Technique in the CHB InverterBased STATCOM”, IEEE Trans. On Power Delivery, Vol. 23, No. 3, pp. 1613-1619, July 2008.
    3. Zhong Du, Burak Ozpineci, Leon M. Tolbert, and John N. Chiasson, “DC–AC Cascaded H-Bridge Multilevel Boost Inverter With No Inductors for Electric/Hybrid Electric Vehicle Applications”, IEEE Trans.On Industry Applications, Vol. 45, No. 3, Pp. 963-970, May/June 2009.
    4. Jianjiang Shi, Wei Gou, Hao Yuan, Tiefu Zhao, and Alex Q. Huang, “Research on Voltage and Power Balance Control for Cascaded Modular Solid-State Transformer”, IEEE Trans. On Power Electronics, Vol. 26, No. 4, pp. 1154-1166, April 2011.
    5.  Zhongyuan Cheng, and Bin Wu, “A Novel Switching Sequence Design for Five-Level NPC/H-Bridge Inverters With Improved Output Voltage Spectrum and Minimized Device Switching Frequency”, IEEE Trans. On Power Electronics, Vol. 22, No. 6, pp.2138-2145, Nov 2007.
    6. H. K. Al-Hadidi, A. M. Gole, and David A. Jacobson, “A Novel Configuration for a Cascade Inverter-Based Dynamic Voltage Restorer with Reduced Energy Storage Requirements”, IEEE Trans. On Power Delivery, Vol. 23, No. 2, pp. 881- 888, April 2008.
    7. Pablo Lezana, José Rodríguez, and Diego A. Oyarzún, “Cascaded Multilevel Inverter with Regeneration Capability and Reduced Number of Switches”, IEEE Trans. On Industrial Electronics, Vol. 55, No. 3, pp. 1059-1066, March 2008.

Recent Article