Open Access Journal

ISSN : 2394-2320 (Online)

International Journal of Engineering Research in Computer Science and Engineering (IJERCSE)

Monthly Journal for Computer Science and Engineering

Open Access Journal

International Journal of Engineering Research in Electrical and Electronic Engineering(IJEREEE)

Monthly Journal for Electrical and Electronic Engineering

ISSN : 2395-2717 (Online)

Call For Paper : Vol. 9, Issue 5 2022
Development of VIP for AMBA AXI v4.0 Protocol using UVM

Author : Venkatesh.T 1 Dr.Narendra C.P 2

Date of Publication :31st July 2021

Abstract: System on Chip(SoCs) allows the integration of different Intellectual Properties(IPs) which makes verification of IP very complex and time-consuming. In order to have proper communication between the IPs, Advanced Microcontroller Bus Architecture(AMBA)-based Advanced eXtensible Interface(AXI) protocol is used as a system bus that provides high bandwidth, low latency, and can able to operate at high frequencies. And comparing with other AMBA protocols AXI provides better efficiency while utilizing the bus. Verification of complex SoCs does take more time to verify. so, by developing a reusable Verification IP (VIP)that allows to reuse this verification environment to verify other SoCs by means of this reusable VIP time taken to verify the SoCs will be greatly reduced. The focus of this research is on creating a VIP for the AMBA AXI v4.0 protocol by utilizing the Universal Verification Methodology (UVM). Here the Design Under Test(DUT) was developed using Verilog and SystemVerilog and the testbench environment has been developed using SystemVerilog verification language and UVM Methodology. And all five independent channels supported by the AXI protocol have been verified. Simulation results and Verification of channels along with functional coverage have been carried out using Mentor Graphics Questa Sim tool

Reference :

    1.  AXI, ”AMBA™ Specification(Rev 5.0)”.
    2. Gayathri M, Rini Sebastian, Silpa Rose Mary, Anoop Thomas,” A SVUVM framework for Verification of SGMII IP Core with reusable AXI to WB Bridge UVC”, 3rd International Conference on Advanced Computing and Communication Systems (ICACCS), Jan. 22 , 2016
    3.  Nishit Gupta, Sunil Alag,” NTRP: Novel Approach for DUT Testing based on Nonintrusive Timing Randomization Probes using SystemC Verification Library”, International Conference on Information Technology(InCiTe)-The Next Generation IT Summit,2016
    4. AXI, ”AMBA CHI Specification”.
    5.  AXI, ”AMBA AXI™ Specification(Rev 5.0)”.
    6. “Mentor Graphics UVM Cookbook”
    7. lasencia-Balabarca, Edward Mitacc-Meza, Mario Raffo-Jara and Carlos SilvaCárdenas,” A Flexible UVM-Based Verification Framework Reusable with Avalon, AHB, AXI and Wishbone Bus Interfaces for an AES Encryption Module”, International Journal of VLSI design & Communication Systems (VLSICS) Vol.3, No.2. 2012

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