Author : Venkatesh.T 1
Date of Publication :31st July 2021
Abstract: System on Chip(SoCs) allows the integration of different Intellectual Properties(IPs) which makes verification of IP very complex and time-consuming. In order to have proper communication between the IPs, Advanced Microcontroller Bus Architecture(AMBA)-based Advanced eXtensible Interface(AXI) protocol is used as a system bus that provides high bandwidth, low latency, and can able to operate at high frequencies. And comparing with other AMBA protocols AXI provides better efficiency while utilizing the bus. Verification of complex SoCs does take more time to verify. so, by developing a reusable Verification IP (VIP)that allows to reuse this verification environment to verify other SoCs by means of this reusable VIP time taken to verify the SoCs will be greatly reduced. The focus of this research is on creating a VIP for the AMBA AXI v4.0 protocol by utilizing the Universal Verification Methodology (UVM). Here the Design Under Test(DUT) was developed using Verilog and SystemVerilog and the testbench environment has been developed using SystemVerilog verification language and UVM Methodology. And all five independent channels supported by the AXI protocol have been verified. Simulation results and Verification of channels along with functional coverage have been carried out using Mentor Graphics Questa Sim tool
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