Open Access Journal

ISSN : 2394-2320 (Online)

International Journal of Engineering Research in Computer Science and Engineering (IJERCSE)

Monthly Journal for Computer Science and Engineering

Open Access Journal

International Journal of Engineering Research in Electrical and Electronic Engineering(IJEREEE)

Monthly Journal for Electrical and Electronic Engineering

ISSN : 2395-2717 (Online)

Call For Paper : Vol. 9, Issue 5 2022
COMPARISON OF POWER IN CMOS AND ADIABATIC FULL ADDER CIRCUITS USING 0.18M TECHNOLOGY PARAMETERS

Author : Neha Sharan 1 Mandavi Gahlot 2

Date of Publication :7th November 2015

Abstract: This paper presents the design and power comparison of charge-recovering adiabatic full adder circuits and CMOS logic based full adder circuit. The low-voltage Adiabatic Logic circuits have been designed for low-voltage, low-power dissipation and high-frequency operation. A comparative analysis was performed in which logic gates were constructed using adiabatic logic. A layout-based simulation was then performed to verify the operation. Simulation results have shown that the adiabatic logic family is suitable for low voltage operation below 0.18?m CMOS technology. Full adder circuitries are vital mechanisms in applications such as micro processors and microcontrollers. Along with the fundamental addition, full adders are used in performing other useful arithmetic operations such as multiplication, division, subtraction, address calculation, etc. In this paper conservative complementary metal oxide semiconductor (CMOS) and adiabatic adder circuits (PFAL, TGAL) are characterized in terms of leakage power, process variations, temperature variations and transistor count using 0.18?m CMOS technology.

Reference :

    1. Gahlot M., Sharan N., Sharma D., “Comparative Analysis of Power Dissipation for CMOS Inverter and Adiabatic Inverter”, International Conference on Advances in Electrical, Power Control, Electronics Engineering and Applied Communication Technology (EPEACT – 2015) Volume2, January-March(2015) pp. 215-218.
    2. Y. Sunil Gavaskar Reddy and V.V.G.S.Rajendra Prasad, Power comparison of CMOS and adiabatic Full adder circuits.
    3.  S.Kang and Y.Leblebici, CMOS Digital Integrated Circuits - Analysis and Design, McGraw-Hill (2003).
    4. Gaurav Singh, Ravi Kumar, Manoj Kumar Sharma, Comparative Analysis Of Conventional Cmos And Energy Efficient Adiabatic Logic Circuits, International Journal of Emerging Technology and Advanced Engineering (ISSN 2250-2459, ISO 9001:2008 Certified Journal, Volume 3, Issue 9, September 2013).
    5. Hamid Mahmoodi-Meimand, Ali Afzali-Kusha, Mehrdad Nourani, Efficiency of Adiabatic Logic for Low-Power.
    6. Antonio Blotti and Roberto Saletti, Ultralow-Power Adiabatic Circuit Semi-Custom Design, IEEE Transactions On Very Large Scale Integration (VLSI)

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