Open Access Journal

ISSN : 2394-2320 (Online)

International Journal of Engineering Research in Computer Science and Engineering (IJERCSE)

Monthly Journal for Computer Science and Engineering

Open Access Journal

International Journal of Engineering Research in Electrical and Electronic Engineering(IJEREEE)

Monthly Journal for Electrical and Electronic Engineering

ISSN : 2395-2717 (Online)

Call For Paper : Vol. 9, Issue 7 2022
A Quad Two-Level Inverter Topology

Author : C.Ganesh 1 S.Srada 2 I.Sreekanthaiah 3

Date of Publication :7th August 2016

Abstract: A multilevel inverter topology for a four-pole induction-motor drive is presented in this paper, which is constructed using the induction-motor stator winding arrangement. A single dc source with a less magnitude when compared with conventional fivelevel inverter topologies is used in this topology. Therefore, power balancing is-sues (which are major challenges in conventional multilevel inverters) are minimized. As this configuration uses a single dc source, it provides a path for zero-sequence currents because of the zero-sequence voltages present in the output, which will flow through the motor phase winding and power electronic switches. To minimize these zero-sequence currents, sinetriangle pulse width modulation (SPWM) is used, which will shift the lower order harmonics near to switching frequency in the linear modulation region. However, in the case of over modulation, harmonic voltages will be introduced close to the fundamental frequency. In this regard, a modified SPWM technique is proposed in this paper to operate the drive in the over modulation region up to the modulation index of 2/?3. The proposed quad two-level inverter topology is experimentally verified with a laboratory prototype on a four-pole 5- hp induction motor. Experimental results show the effectiveness of the pro-posed topology in the complete linear modulation region and the over modulation region.

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